Engineering of contact resistance between transparent single-walled carbon nanotube films and a-Si:H single junction solar cells by gold nanodots.

The viability of single-walled carbon nanotubes (SWCNTs) as a transparent conducting electrode on a-Si:H based single junction solar cells was explored. A Schottky barrier formed at a SWCNT/a-Si:H interface was removed by introducing high work function gold nanodots at the SWCNT/a-Si:H interface. This allows comparable device performance from SWCNT-electrode-based a-Si:H solar cells to that obtained by using conventional transparent conducting oxides.

Three-dimensional a-Si:H solar cells on glass nanocone arrays patterned by self-assembled Sn nanospheres.

We introduce a cost-effective method of forming size-tunable arrays of nanocones to act as a three-dimensional (3D) substrate for hydrogenated amorphous silicon (a-Si:H) solar cells. The method is based on self-assembled tin nanospheres with sizes in the range of 20 nm to 1.2 μm.

Graphene flash memory.

Graphene's single atomic layer of sp(2) carbon has recently garnered much attention for its potential use in electronic applications. Here, we report a memory application for graphene, which we call graphene flash memory (GFM). GFM has the potential to exceed the performance of current flash memory technology by utilizing the intrinsic properties of graphene, such as high density of states, high work function, and low dimensionality.

A stacked memory device on logic 3D technology for ultra-high-density data storage.

We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency.

Single-crystalline Ni2Ge/Ge/Ni2Ge nanowire heterostructure transistors.

In this study, we report on the formation of a single-crystalline Ni(2)Ge/Ge/Ni(2)Ge nanowire heterostructure and its field effect characteristics by controlled reaction between a supercritical fluid-liquid-solid (SFLS) synthesized Ge nanowire and Ni metal contacts. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) studies reveal a wide temperature range to convert the Ge nanowire to single-crystalline Ni(2)Ge by a thermal diffusion process. The maximum current density of the fully germanide Ni(2)Ge nanowires exceeds 3.

Metal nanodot memory by self-assembled block copolymer lift-off.

As information technology demands for larger capability in data storage continue, ultrahigh bit density memory devices have been extensively investigated. To produce an ultrahigh bit density memory device, multilevel cell operations that require several states in one cell have been proposed as one solution, which can also alleviate the scaling issues in the current state-of-the-art complementary metal oxide semiconductor technology. Here, we report the first demonstration of metal nanodot memory using a self-assembled block copolymer lift-off.