Introducing Semiconducting-to-Metallic Transitions into Wafer-Scale 2D PdSe Layers by Low-Temperature Anion Exchange and Thickness Modulation.

Two-dimensional (2D) palladium diselenide (PdSe) layers are projected to exhibit a number of intriguing electrical properties such as semiconducting-to-metallic transitions. Precisely modulating their morphology and chemistry is essential for realizing such opportunities, which is particularly demanded on a large dimension under flexible processing conditions toward broadening their practical device applicability. Herein, we explore a wafer-scale growth of 2D PdSe layers and introduce semiconducting-to-metallic transitions into them at as low as 330 °C, a temperature compatible with a range of polymeric substrates as well as the back-end-of-line (BEOL) processes.

High Mobility Transistors and Flexible Optical Synapses Enabled by Wafer-Scale Chemical Transformation of Pt-Based 2D Layers.

Electronic devices employing two-dimensional (2D) van der Waals (vdW) transition-metal dichalcogenide (TMD) layers as semiconducting channels often exhibit limited performance (e.g., low carrier mobility), in part, due to their high contact resistances caused by interfacing non-vdW three-dimensional (3D) metal electrodes.