Author Correction: Memristive synapses connect brain and silicon spiking neurons.

An amendment to this paper has been published and can be accessed via a link at the top of the paper.

Memristive synapses connect brain and silicon spiking neurons.

Brain function relies on circuits of spiking neurons with synapses playing the key role of merging transmission with memory storage and processing. Electronics has made important advances to emulate neurons and synapses and brain-computer interfacing concepts that interlink brain and brain-inspired devices are beginning to materialise. We report on memristive links between brain and silicon spiking neurons that emulate transmission and plasticity properties of real synapses.

An Electrical Characterisation Methodology for Benchmarking Memristive Device Technologies.

The emergence of memristor technologies brings new prospects for modern electronics via enabling novel in-memory computing solutions and energy-efficient and scalable reconfigurable hardware implementations. Several competing memristor technologies have been presented with each bearing distinct performance metrics across multi-bit memory capacity, low-power operation, endurance, retention and stability. Application needs however are constantly driving the push towards higher performance, which necessitates the introduction of a standard benchmarking procedure for fair evaluation across distinct key metrics.

Impact of Line Edge Roughness on ReRAM Uniformity and Scaling.

We investigate the effects of Line Edge Roughness (LER) of electrode lines on the uniformity of Resistive Random Access Memory (ReRAM) device areas in cross-point architectures. To this end, a modeling approach is implemented based on the generation of 2D cross-point patterns with predefined and controlled LER and pattern parameters. The aim is to evaluate the significance of LER in the variability of device areas and their performances and to pinpoint the most critical parameters and conditions.

Spike sorting using non-volatile metal-oxide memristors.

Electrophysiological techniques have improved substantially over the past years to the point that neuroprosthetics applications are becoming viable. This evolution has been fuelled by the advancement of implantable microelectrode technologies that have followed their own version of Moore's scaling law. Similarly to electronics, however, excessive data-rates and strained power budgets require the development of more efficient computation paradigms for handling neural data in situ; in particular the computationally heavy task of events classification.

Challenges hindering memristive neuromorphic hardware from going mainstream.

Memristive devices have elicited intense research in the past decade thanks to their inherent low voltage operation, multi-bit storage and cost-effective manufacturability. Nonetheless, several outstanding performance and manufacturability challenges have prevented the widespread industry adoption of redox-based memristive matrices. Here, we discuss these challenges in terms of key metrics and propose a roadmap towards realizing competitive memristive-based neuromorphic processing systems.

Seamlessly fused digital-analogue reconfigurable computing using memristors.

As the world enters the age of ubiquitous computing, the need for reconfigurable hardware operating close to the fundamental limits of energy consumption becomes increasingly pressing. Simultaneously, scaling-driven performance improvements within the framework of traditional analogue and digital design become progressively more restricted by fundamental physical constraints. Emerging nanoelectronics technologies bring forth new prospects yet a significant rethink of electronics design is required for realising their full potential.

Sub 100 nW Volatile Nano-Metal-Oxide Memristor as Synaptic-Like Encoder of Neuronal Spikes.

Advanced neural interfaces mediate a bioelectronic link between the nervous system and microelectronic devices, bearing great potential as innovative therapy for various diseases. Spikes from a large number of neurons are recorded leading to creation of big data that require online processing under most stringent conditions, such as minimal power dissipation and on-chip space occupancy. Here, we present a new concept where the inherent volatile properties of a nano-scale memristive device are used to detect and compress information on neural spikes as recorded by a multielectrode array.

Multibit memory operation of metal-oxide bi-layer memristors.

Emerging nanoionic memristive devices are considered as the memory technology of the future and have been winning a great deal of attention due to their ability to perform fast and at the expense of low-power and -space requirements. Their full potential is envisioned that can be fulfilled through their capacity to store multiple memory states per cell, which however has been constrained so far by issues affecting the long-term stability of independent states. Here, we introduce and evaluate a multitude of metal-oxide bi-layers and demonstrate the benefits from increased memory stability via multibit memory operation.

Improving Detection Accuracy of Memristor-Based Bio-Signal Sensing Platform.

Recently a novel neuronal activity sensor exploiting the intrinsic thresholded integrator capabilities of memristor devices has been proposed. Extracellular potentials captured by a standard bio-signal acquisition platform are fed into a memristive device which reacts to the input by changing its resistive state (RS) only when the signal ampitude exceeds a threshold. Thus, significant peaks in the neural signal can be stored as non-volatile changes in memristor resistive state whilst noise is effectively suppressed.

Resistive switching of Pt/TiO /Pt devices fabricated on flexible Parylene-C substrates.

Pt/TiO /Pt resistive switching (RS) devices are considered to be amongst the most promising candidates in memristor family and the technology transfer to flexible substrates could open the way to new opportunities for flexible memory implementations. Hence, an important goal is to achieve a fully flexible RS memory technology. Nonetheless, several fabrication challenges are present and must be solved prior to achieving reliable device fabrication and good electronic performances.

Unsupervised learning in probabilistic neural networks with multi-state metal-oxide memristive synapses.

In an increasingly data-rich world the need for developing computing systems that cannot only process, but ideally also interpret big data is becoming continuously more pressing. Brain-inspired concepts have shown great promise towards addressing this need. Here we demonstrate unsupervised learning in a probabilistic neural network that utilizes metal-oxide memristive devices as multi-state synapses.

Real-time encoding and compression of neuronal spikes by metal-oxide memristors.

Advanced brain-chip interfaces with numerous recording sites bear great potential for investigation of neuroprosthetic applications. The bottleneck towards achieving an efficient bio-electronic link is the real-time processing of neuronal signals, which imposes excessive requirements on bandwidth, energy and computation capacity. Here we present a unique concept where the intrinsic properties of memristive devices are exploited to compress information on neural spikes in real-time.

High Density Crossbar Arrays with Sub- 15 nm Single Cells via Liftoff Process Only.

Emerging nano-scale technologies are pushing the fabrication boundaries at their limits, for leveraging an even higher density of nano-devices towards reaching 4F(2)/cell footprint in 3D arrays. Here, we study the liftoff process limits to achieve extreme dense nanowires while ensuring preservation of thin film quality. The proposed method is optimized for attaining a multiple layer fabrication to reliably achieve 3D nano-device stacks of 32 × 32 nanowire arrays across 6-inch wafer, using electron beam lithography at 100 kV and polymethyl methacrylate (PMMA) resist at different thicknesses.

Investigation of the Switching Mechanism in TiO2-Based RRAM: A Two-Dimensional EDX Approach.

The next generation of nonvolatile memory storage may well be based on resistive switching in metal oxides. TiO2 as transition metal oxide has been widely used as active layer for the fabrication of a variety of multistate memory nanostructure devices. However, progress in their technological development has been inhibited by the lack of a thorough understanding of the underlying switching mechanisms.

Emulating short-term synaptic dynamics with memristive devices.

Neuromorphic architectures offer great promise for achieving computation capacities beyond conventional Von Neumann machines. The essential elements for achieving this vision are highly scalable synaptic mimics that do not undermine biological fidelity. Here we demonstrate that single solid-state TiO2 memristors can exhibit non-associative plasticity phenomena observed in biological synapses, supported by their metastable memory state transition properties.

Implementation of a spike-based perceptron learning rule using TiO2-x memristors.

Synaptic plasticity plays a crucial role in allowing neural networks to learn and adapt to various input environments. Neuromorphic systems need to implement plastic synapses to obtain basic "cognitive" capabilities such as learning. One promising and scalable approach for implementing neuromorphic synapses is to use nano-scale memristors as synaptic elements.

Coexistence of memory resistance and memory capacitance in TiO2 solid-state devices.

This work exploits the coexistence of both resistance and capacitance memory effects in TiO2-based two-terminal cells. Our Pt/TiO2/TiO x /Pt devices exhibit an interesting combination of hysteresis and non-zero crossing in their current-voltage (I-V) characteristic that indicates the presence of capacitive states. Our experimental results demonstrate that both resistance and capacitance states can be simultaneously set via either voltage cycling and/or voltage pulses.

Stochastic switching of TiO2-based memristive devices with identical initial memory states.

In this work, we show that identical TiO2-based memristive devices that possess the same initial resistive states are only phenomenologically similar as their internal structures may vary significantly, which could render quite dissimilar switching dynamics. We experimentally demonstrated that the resistive switching of practical devices with similar initial states could occur at different programming stimuli cycles. We argue that similar memory states can be transcribed via numerous distinct active core states through the dissimilar reduced TiO2-x filamentary distributions.

Memory impedance in TiO2 based metal-insulator-metal devices.

Large attention has recently been given to a novel technology named memristor, for having the potential of becoming the new electronic device standard. Yet, its manifestation as the fourth missing element is rather controversial among scientists. Here we demonstrate that TiO2-based metal-insulator-metal devices are more than just a memory-resistor.